I said that Barcelona (and Phenom) as a strategy implied absolute confidence to succeed at three important challenges:
- Extraordinarily good 65nm silicon process, to try to close the competitiveness gap to Intel
- A new architecture developed without the help of a thoroughly understood process
- The single-die quadcore feature that implies a hit of yields and especially binsplits
Adrian Kingsley-Hughes writes "AMD's Phenom - For suckers only". There we find a reference to "Tom's Hardware" that demonstrates that the 6400+ X2 (3.2 GHz, 90nm [you may go here and select the 6400+ model to confirm the specifications]) beats the fastest Phenom, the 9600 2.3 GHz at a variety of tests. That is, even today, a year after the launch of 65nm product, it is the 90nm products the ones that have the performance crown of AMD. No wonder that the highest selling price processors [AMD's official price list], both Athlon and Opteron, are all 90nm. Not only the 65nm processors are slow and the company sells them on the cheap, but inexplicably, the 65nm K8 are an involution compared to the 90nm, even taking into account that the company has five and more years of experience with the K8 design. The 65nm is not slightly better, but slightly worse, AMD cut corners like increasing the L2 cache latencies.
Rumors have surfaced regarding bugs in the K10 architecture that have delayed its introduction [example]. AMD has had to develop the silicon process at the same time it tries to debug the new architecture, that's the recipe for low yields, unacceptably slow speeds, and late introduction. There are good improvements in the K10 architecture, but I think the existence of a third cache level could be the culprit of the K10 lukewarm performance: The K8 had a an architecture of two levels that due to the exclusivity of the L1 resembled more the delays of a 1.5 levels, but now, rather than having a large shared L2 cache, as the successful Intel approach demonstrates, the K10 has three levels. Why? my speculation is that a quadcore design requires a large shared cache and I think AMD didn't dare to try this radical change at the L2, so, it came with a third level that offers dubious performance advantages. Do you see? A shared cache is more natural in a single die design, yet, AMD has insisted in a less efficient independent L2 and that forced it to introduce a third level, shared, creating an inefficient three level hybrid.
We also know that AMD will launch triple-cores, speaking volumes about its dramatic failure at the challenge of single-die quadcores. To further illustrate the principles that dictate exponentially worse yields and binsplits in single-die multicores, AMD is launching an overclocking application that allows the user to control individually the speeds of every individual core.
Yet, AMD didn't need to to follow this route at all. It could have developed 65nm not with the intention of increasing numbers but premiums. AMD speaks of "Asset Light" today because it has plenty of production capacity of low performance products of which the market is saturated but doesn't have any high-premium product; perhaps because AMD saw the 65nm process as a tool to minimize production costs and increase production volumes rather than the process for the new generation of flagship products. The emphasis on volume/cheap production costs rather than performance while developing the 65nm process may have its origins on AMD's "pharaonic" plans of having to supply all the OEMs with plenty of product, especially the production capacity increase that Dell meant. Perhaps performance had to wait. But not even that strategy worked: we know what happened when AMD, a year ago, gave preferences to Dell and other OEMs rather than the channel: the destruction of the loyal and natural businesses of AMD.
AMD didn't need a new architecture to market quadcores, it had several MCM options at its disposal. It is clear today that the excellent interprocessor bandwidth of DCA and CCHT would have been more than enough to have processors with two dual core dice in which only one has interface to memory and the other communicates through CCHT. Actually, AMD had every advantage to put quadcores in the market before Intel; but of course, the company decided the strategy of skipping all intermediate steps for the big leap of the single die quadcores and this catastrophe happened.
Also, the company may have opted for a new architecture that actually increased performance. The most pathetic thing of all is that K10 quadcores, even having the large advantages of single dieness integration and point to point (busless) interprocessor communication, is actually SLOWER per clock than the Intel double dual kludge. When you try not to improve performance, but to solve the problems that derive from single-dieness, you may end up with an architecture that is good for nothing.
Adrian Kingsley-Hughes again: "So really, what’s the bottom line? AMD have put time, effort and truck loads of dollars into developing a quad-core processor that really isn’t that good".
Now, let's look at Phenom versus Intel products:
Anandtech (referenced by Kingsley-Hughes): "While AMD just introduced its first 2.2GHz and 2.3GHz quad-core CPUs today, Intel previewed its first 3.2GHz quad-core chips", "Intel is currently faster and offers better overall price-performance (does anyone else feel weird reading that?). Honestly the only reason we can see to purchase a Phenom is if you currently own a Socket-AM2 motherboard".
Tarinder Sandhu @ HEXUS.net (also referenced by Kingsley-Hughes): "We've disseminated all the various enhancements that make Phenom a better clock-for-clock proposition than Athlon 64 X2. We've identified that the design is elegant[.] But what we've also seen is that AMD cannot match the clock-speed of Intel's slowest quad-core processor and, worse still, can't match Core2 Quad's performance on a clock-for-clock basis either." and "the Spider platform - where AMD tries to harness the innate synergies of its processors, chipsets and GPUs - can be bettered by a mix-and-match assortment of Intel and NVIDIA" -- so much for the "synergies" of the ATI acquisition, over a year later, there is unanimous agreement that Intel+nVidia is superior.
But the real problem is not that Phenom (and Barcelona) stinks: Intel is busy finishing a new busless platform and architecture. AMD demonstrated that most of DCA and CCHT are overkill for the vast majority of computers, that is, Intel doesn't have to do something as fancy as DCA and CCHT, but something just good enough to get rid of the most important limitation that their architecture has: The front side bus. Also, from the "pure muscle" point of view, Intel is already putting processors with metal gates and high-k dielectrics (that is, much more efficient and faster) while AMD is still trying to catch up to its own 90nm!; so, the competitive position of AMD will become worse, much worse!
Jason Cross @ Extremetech (also ref. by Kingsley-Hughes) mentions this in passing: "As Yorkfield CPUs mature and come down in price, the only way for these Phenom chips to compete will be to offer much better clock speeds without blowing out the power envelope, and they won't get there on 65nm. AMD simply can't afford to let Intel's Nehalem redesign hit the market, mature, and come down in price before bringing out a wide range of 45nm Phenom CPUs."
I think that nobody should be talking about AMD's 45nm products when the company is still flunking repeatedly the 65nm grade.
Anyway, regarding AMD's future, things are turning hopeless: It can't get rid of the fabs it owns due to either x86 licensing restrictions or contractual obligations with Dresden, thus, no "Asset Light", but expensive Fabs that will be less and less competitive to what Intel is doing. nVidia keeps getting ahead relentlessly in the graphics business while ATI is still shedding Intel-based market share and no synergies in sight. AMD can only move product on price, but it is already enduring losses of nightmare; all while Intel comes with vastly more competitive products and AMD already used up its best ammunition...
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